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Sunday, 1 July 2018

00:00:00 --- log: started osdev/18.07.01
00:00:44 <nastaki> i think my intervention on os writing is not needed, and even more since there are some truely enjoyable and stable OS's existing today, i am a big linux fan myself
00:01:19 <nastaki> but yeah google really would want to treat some os's as their own, so i do not mind some deving that you do
00:01:22 <klange> it's not about whether the current OSes are good or not, it's about having a hobby that keeps you from slinging insults and abuse at people on IRC
00:03:18 <nastaki> ok ok, i understand, i have a hobby and reasonable understanding based of the internet studies how oses actually work, but i think my intervention is needed somewhere else in more innovative manner
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00:03:50 <nastaki> that being said, i think you have the resillience to write stuff, but i want to see more invasive things my own
00:05:10 <nastaki> there is no point to argue that geist has written a fair amount of code in his life, and many OS's i won't try to argue it's a fact, i can see that
00:07:01 <nastaki> ok . lets say i finish my current tasks, then i try something on os deving ok?
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00:09:17 <nastaki> i am unsure why can't you see this from another perspective, it's all good if you handle the OS stuff your own, and other person brings in the variety of other stuff added for the future
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00:12:50 <nastaki> you can simply ignore me when you want to continue you daily basis activity until i get ready too with my performance enhancement work, not needed to upset me and block and ban me at all
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00:14:48 <nastaki> as much as i wanted to deny this happening or not, i probably will become a programmer still
00:15:08 <nastaki> hobby one, maybe not professional but...
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00:16:46 <nastaki> i saw my friend bullying yestirday annoying people as hell, i'd rather live my silent life behind a screen instead, i do not fancy going to blame innocent people cause of my misluck
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00:24:10 <nastaki> currently i am off to bed, i am fairly ready to code stuff, was looking the final bits and pieces about warp ordering, there is a multilayer defence around the hack, i have three layers, i just look which one to use
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00:25:41 <bauen1> so my code breaks when compiled by gcc with optimisations, but when using kvm everything works again
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00:26:54 <mischief> haha.
00:27:00 <nastaki> i tried to work with psychologist as advised, but i am fairly stable aside from rage attacks that i face, i am fairly certain i do not accuse or blame innocent guys anyways about what happened to me, this is my main view in life, if someone is not guilty one can't be charged
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00:46:32 <promach_> Why would instruction pipelining be slowed down by branches ? Note: this performance penalty could be compensated using branch prediction mechanism
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01:08:28 <bcos> promach_: For a very basic "fetch; decode; execute" (where CPU is executing an instruction while decoding the next instruction while fetching the instruction after that); what happens when you have no idea what address to fetch from?
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01:13:05 <mischief> can we ban ALowther already
01:14:04 <klange> Ban, no, but I'll try kicking them and see if their client stops attempting to rejoin.
01:14:11 --- mode: ChanServ set +o klange
01:14:22 --- kick: ALowther was kicked by klange (Please fix your connection.)
01:14:28 <clever> klange: when i checked the math before, it said he was crashing just 7 seconds after connecting
01:14:34 <clever> klange: so you may need to kick him within seconds of joining, or the client wont get the msg
01:14:57 <klange> Possibly.
01:15:12 <klange> I'll keep ops up and wait for him to come back again.
01:17:33 <promach_> bcos: but how does https://en.wikipedia.org/wiki/Predication_(computer_architecture)#Advantages help in this case ?
01:17:33 <bslsk05> ​en.wikipedia.org: Predication (computer architecture) - Wikipedia
01:18:20 <bauen1> So I'm currently fighting gcc with this: https://gitlab.com/snippets/1729563 if I prevent the functions from being inlined everything works fine, if I don't nothing works, but the volatile should be enough to tell gcc not to mess with the write / read, right ?
01:18:21 <bslsk05> ​gitlab.com: e1000 mmio gcc optimisation ($1729563) · Snippets · GitLab
01:19:28 <klange> promach_: you are confusing predication and prediction, methinks
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01:23:23 <bauen1> I guess moving mmio helpers in a sperate object file works ....
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01:32:02 <bcos> promach_: For predication; typically CPU executes the instructions and then ignores the result if it was disabled by the predicate; so it doesn't interfere with other stages of the pipeline
01:32:14 <bcos> (fetch still fetches a linear sequence, decode still decodes like normal)
01:33:18 <promach_> I see, predication does not stall the pipeline, waiting for branch target address
01:33:21 <promach_> bcos
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01:34:39 <bcos> promach_: Yes. Of course if there's many instructions with the same predicate you end up doing stuff for no reason and a branch becomes cheaper
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01:36:16 <bcos> ..and modern CPUs are advanced enough (e.g. "external instruction set" converted into "micro-code") and it wouldn't be that hard for CPU to convert between predicates and branches so it doesn't really matter what the external instruction set uses
01:37:31 <bcos> E.g. maybe Intel could treat "jne foo; add eax,1; foo:" into microcode that uses an "if equal" predicate
01:37:43 <ybyourmom> I finally learned the correct way to build a libstdcxx-v3 to link against my kernel
01:37:45 <bcos> *convert
01:37:58 <ybyourmom> Ayyy, no more writing my own c++ stdlib headers
01:38:28 <klange> sounds like a step backwards to me :)
01:38:47 <bcos> E.g. maybe Intel could convert "cmovne eax,ebx" into microcode that actuall does "je .over; mov eax,ebx; .over"
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01:41:33 <promach_> bcos: microcode versus predication ?
01:42:01 <ybyourmom> Also got libsupc++.a, so I can use exception in kernel now
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01:44:29 <bcos> promach_: Versus? No.. You can convert anything into anything if you try hard enough, so branches can be converted into predicates and predicates can be converted into branches, and you can't really say that either is better/worse because they're the same
01:45:00 <bcos> *potentially the same
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01:48:28 <promach_> bcos: why did you mention microcode ?
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01:51:35 <klys> wouldn't a "compare and move if not equal" include a comparison: cmp eax,ebx; je .over; move eax,ebx; .over:
01:52:14 <bcos> promach_: I'm just saying that whether or not a CPU uses predicates (and when) may have nothing to do with wether the "machine code" for the CPU uses predicates
01:52:45 <bcos> klys: Yes
01:53:02 <bcos> Ah
01:53:26 <bcos> klys: "cmovne" is "conditional move if not equal" (where "not equal" is the condition) - there's no comparison
01:53:47 <klys> o thx.
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01:54:48 <bcos> E.g. "cmp eax,ebx; cmovne eax,ebx" would be the same as "cmp eax,ebx; je .over; mov eax,ebx; .over"
01:55:01 <klys> yes i see
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02:02:37 <doug16k> conditional moves check the flags, the same way as a conditional branch checks the flags, one predicates a move, the other predicates taking a branch
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02:04:53 <doug16k> conditional moves are great because misprediction is not possible, no matter what it will never cause a pipeline flush
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02:09:43 <promach_> doug16k: why conditional moves will never cause a pipeline flush ?
02:10:09 <bcos> Flush or stall?
02:11:42 <doug16k> promach_, because the conditional move takes a dependency on the flags, the destination, and the source register. it will simply wait in the scheduler until the flags and source are available, then it will be issued. when it is executed it will either store the original value of the destination to the destination, or it will store the source
02:12:25 <bcos> ..and then everything that depended on the results will have to wait too, and then... ;-)
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02:13:03 <doug16k> when a branch mispredicts, everything it speculatively executed after the branch is wrong, so it has to throw away all that work, and start fetching again at the correct branch target (either the branch argument or the next instruction)
02:13:29 <doug16k> the entire pipeline has to fill up again before it gets any work done, probably about 14 cycles wasted, at least
02:14:39 <doug16k> cmov just overlaps execution with all the dependency chains that are active at the time it is executed, no flush/restart happens, it can't be wrong
02:15:49 <doug16k> bcos, sure, but it is the lesser of two evils :)
02:16:40 <doug16k> processors are insanely powerful today mainly because they overlap tons of dependency chains at once. cmov maximizes that
02:17:15 <bcos> It can't be wrong, but it can be wastful and slower than a correctly predicted branch. It's also extrememly restrictive - there's no "cmul", or "lock cinc", or...
02:17:41 <doug16k> sometimes you can't cmov though, when you must avoid a memory access you can't predicate that
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02:17:58 <doug16k> bcos, mul is practically free now
02:18:06 <bcos> MUL can't be free
02:18:22 <doug16k> have you checked how many cycles it is lately?
02:18:52 <bcos> Is it less than "add"?
02:19:15 <doug16k> 2 cycles on ryzen
02:19:25 <doug16k> 8 bit is 1
02:19:31 <bcos> Erm
02:19:36 <bcos> Throughput or latency?
02:19:40 <doug16k> latency
02:20:08 <doug16k> 64, 32, and 16 bit are 2. 8 bit is 1
02:20:49 <bcos> Hmm - if they can MUL in 2 cycles, they should be able to ADD in half a cycle (like P4 did) :-)
02:21:26 <doug16k> they can almost just combinatorially slam out the whole multiply in a single cycle with the nano-tech transistors we have now :D
02:21:59 <promach_> What does it mean by "cmov just overlaps execution with all the dependency chains that are active at the time it is executed" ?
02:22:02 <promach_> https://stackoverflow.com/questions/14131096/why-is-a-conditional-move-not-vulnerable-for-branch-prediction-failure
02:22:04 <bslsk05> ​stackoverflow.com: performance - Why is a conditional move not vulnerable for Branch Prediction Failure? - Stack Overflow
02:22:06 <promach_> doug16k
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02:22:38 <doug16k> promach_, do you know what dependencies are?
02:23:42 <promach_> data dependencies ?
02:24:00 <doug16k> cmovne eax,ebx <-- depends on eflags, eax, ebx. the instruction will enter a part of the pipeline that waits for its dependencies. when the last instruction that updates eflags, eax, and ebx are complete, the cmov is eligible to be executed
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02:24:26 <promach_> then it is not overlapping
02:24:42 <doug16k> yes it is, because it is fetching ahead and overlapping future instructions with it
02:24:51 <promach_> what ?
02:24:58 <promach_> overlapping future instructions ?
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02:26:21 <doug16k> fetch goes way ahead of execution. instructions enter a queue, waiting for their inputs. the oldest instruction in the queue that has its dependencies ready is selected to be dispatched. the processor overlaps many independent dependency chains
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02:27:18 <doug16k> it can decode and enqueue multiple instructions every cycle (typically 3 or 4), it can select and dispatch multiple instructions every cycle (typically many)
02:27:45 <doug16k> after the waiting queue there are multiple execution ports. it can select and dispatch multiple instructions to ports each cycle
02:28:17 <doug16k> when an instruction has finished, it is flagged as ready to be retired. the processor retires the oldest completed instructions and commits their results
02:29:08 <doug16k> so fetch, waiting for dependencies, and retirement are all overlapped over a huge queue window, typically it can overlap over 100 outstanding instructions
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02:31:07 <doug16k> example: let's say you had mov eax,[something_cache_miss] ; add eax,42 ; mov [something_else],eax ; xor ebx,ebx ; mul ebx,edx
02:31:27 <doug16k> it can execute the xor and the mul long before it gets the cache miss from memory
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02:31:45 <doug16k> the mul will wait until the instruction that set edx has completed, probably long before the cache hit
02:32:00 <doug16k> extend that example out to 100+ instructions overlapping and you get the idea
02:34:15 <doug16k> xor a register with itself is special cased to not depend on the arguments, it translates that to a load zero and set flags to a constant
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02:34:53 <doug16k> several other combinations are also special cased to load constants and don't really depend on what they appear to depend upon
02:35:35 <doug16k> it "breaks the dependency chain", so that instruction can execute far ahead of time and get started even if previous instructions are stalling on something
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02:37:51 <doug16k> it also renames registers onto a much larger actual register file, so you can reuse the same register several times and each store to a register "renames" that register at that point. as instructions retire it maintains a lookup table pointing to the internal register which represents that programmer-visible register at that point in the program
02:38:48 <clever> and in the case of a branch where both ends write to a given register, could it have 2 different versions of that lookup table?
02:38:51 <doug16k> so in my example above, I could have used eax again, and it would have just renamed to another register but remembered that at that point, eax is another register internally
02:40:31 <doug16k> yes it can have any number of copies of eax. each store to a register allocates a new internal register. any instruction after that store to the register will depend upon whatever internal register got assigned at that point
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02:42:00 <doug16k> that is how it can speculatively execute. if it mispredicts, then the incorrectly executed instructions will have changed the renamed register, not the actual registers. when it flushes and restarts it resets the register names to be what they were at the point it mispredicted, undoing everything that should not have executed
02:42:29 <clever> and how does things like spectre and meltdown come into play?
02:42:40 <clever> if the mispredicted branch is reading stuff you shouldnt even have access to read
02:42:51 <clever> then shouldnt it just not reveal that renamed register with the sensitive data?
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02:44:33 <doug16k> when you read or write data, the cpu brings it into the cache. if it speculatively executes a load or store, it still brings it into the cache. meltdown takes advantage of that. you cause the processor to speculatively access memory it should not have been allowed to read
02:44:48 <doug16k> intel doesn't check permissions until the instruction retires
02:45:01 <clever> wont that just leave it in a cache row, and you should still not be able to read that row?
02:45:28 <clever> so its just a timing thing to see if a given address is mapped or not?
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02:45:37 <doug16k> you can cause the cpu to speculatively read memory it should not have been allowed to read, then use the value in an address calculation, and touch a different cache line for each possible value
02:45:52 <clever> oh
02:46:11 <clever> so you read the memory at address $private * 8, using it as an array index
02:46:12 <doug16k> the value never gets assigned to a programmer visible register, but you can infer the value based on which cache line got brought into the cache
02:46:19 <clever> and then test to see if address X is in the cache or not
02:46:22 <doug16k> yes
02:46:28 <clever> and then deduce what $private was
02:46:32 <doug16k> yes
02:46:37 <clever> that makes a lot more sense
02:46:56 <doug16k> amd checks the permissions in speculated execution, so it is immune to meltdown
02:47:07 <doug16k> intel defers it until the last moment, far too late
02:47:10 <clever> so its pre-executing at least 2 opcodes, the first reading stuff it shouldnt, then the 2nd reading an address based on the private number
02:47:15 <doug16k> yes
02:48:28 <clever> what about spectre, that one didnt have to do with userland/kernel seperation, right?
02:49:29 <doug16k> spectre is for reading memory in the same process that you shouldn't be able to read. you could read memory in a browser outside the javascript engine, for example
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02:50:14 <doug16k> js engines have reduced the precision of performance.now() to mitigate it
02:50:39 <doug16k> I don't know how it is done in js though
02:52:44 <clever> chrome also has a process-per-domain option to help
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02:53:59 <doug16k> it's amazing how far attackers will go to find an exploit now
02:54:15 <doug16k> it's also amazing how long meltdown was just sitting there, unnoticed :)
02:54:28 <clever> i'm also surprised things like rowhammer can work in JS
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02:55:04 <doug16k> I'm still waiting for a rowhammer that works on ryzen. I want to see if it can rowhammer kingston ecc memory :D
02:55:28 <clever> lol
02:55:58 <doug16k> it has to be precisely tuned for a specific memory controller to work. it has to know exactly how addresses translate to rows and columns
02:56:07 <clever> yeah
02:56:08 <doug16k> ...and banks and channels
02:58:46 <doug16k> and if it fails, I'll try enabling amd's secure memory encryption and see if it can rowhammer that :)
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02:58:55 <doug16k> at best it can corrupt memory. I don'
02:59:05 <doug16k> t see how it has any chance of setting specific values
02:59:25 <bcos> I doubt you can rowhammer ECC with any CPU
03:00:05 <bcos> (you'd just increase the number of corrected errors)
03:00:28 <clever> id think its harder then winning the lottery, since you have to flip the checksum bits just right, in the same operation that flips other bits
03:00:39 <clever> and since its already random if its even going to flip the bits your targeting
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03:09:59 <doug16k> hey neat. my system is already using full memory encryption
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03:13:34 <doug16k> if someone clubs me over the head and tries to do a cold boot attack on my machine while I lay unconscious, I'm set :P
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03:18:22 <bcos> doug16k: In that case; if someone does hammer your rows you'll get an entire cache line of "random" instead of just one bit flipped
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03:19:28 <clever> bcos: i think it would depend on if the individual bits within the row depend on eachother during encryption, or if its just an xor against a psueo-random row
03:19:44 <clever> +d
03:20:21 <Desetude> I have been creating my operating system as a school project and have to show something off to do with it for like 30 minutes for different people to come around and look. I've not gone very far, currently have paging, interrupts, keyboard, timer and not much else. Anyone got any ideas for things that I could work on which I could at least somewhat show off for people who don't know much about operating
03:20:22 <Desetude> systems? Otherwise I might just have some posters up about the history of operating systems or something
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03:22:45 <bcos> clever: I'd hope it's not XOR (otherwise malcious device can write zeros to discover the value for a cache line and use that value later to determine data)
03:22:49 <Desetude> I have 2 weeks to make something interesting or at least have something to talk about
03:22:54 <klange> make a gui
03:23:22 <bcos> Desetude: Create a large poster showing the expected time line of how long it takes to write an OS
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03:24:14 <Desetude> bcos: Yea, that would actually be really interesting
03:25:11 <Desetude> klange: I don't think I'd have enough time to make a gui which is impressive enough, although I haven't look into it much
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03:30:38 <doug16k> Desetude, it's like asking an airplane designer to explain why his wing is so great. he could show weeks of wind tunnel analysis and fluid dynamics simulations, equations etc, explaining how it can go to a steep angle of attack before it stalls, and has high lift at low speed, etc or he could say "lots of lift, not much drag"
03:30:58 <doug16k> the former baffles normal people, the latter is underwhelming. what can you do?
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03:32:21 <Desetude> doug16k: Yep I'm finding it really hard to figure out what to do but I might do something similiar to what bcos said as that could go well
03:32:28 <doug16k> a person would need to know a fair bit about computers to comprehend what you have so far. don't expect to impress the average person
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03:35:27 <Desetude> I've got my expectations low :P
03:35:47 <klange> What is the target audience?
03:36:00 <klange> What school level is this, as well?
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03:38:54 <klange> unrelated, it's been a year since I updated this album: https://imgur.com/a/mSzJO
03:38:54 <bslsk05> ​imgur.com: とあるOS History Album - Album on Imgur
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03:43:01 <Desetude> klange: the people that are there do not necessarily do CS or understand computers but I'd hope to be able to at least somewhat talk to people with any level of understanding of computers. But realisticly that's not going to work very well.
03:43:22 <Desetude> It's first year of UK sixth form, so 17 year olds
03:43:38 <klange> stick to posters and blinkenlights, then
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03:44:08 <bauen1> Desetude: how much hours can you spent in the 2 weeks ?
03:44:57 <Desetude> bauen1: realistically, 20 maybe?
03:45:22 <Desetude> klange: Will do
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03:47:17 <glauxosdever> klange: Your album is cool. It really shows how features are added over time and how redesigns take place
03:47:34 <glauxosdever> I wonder if I'll have something like that to show sometime
03:48:59 <bauen1> basically what klange already said, maybe add a computer which shows the source code of the kernel and the kernel running in a virtual machine / on the hardware
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03:50:43 <bauen1> if you want to show your kernel, you really need vesa framebuffer support
03:50:51 <bauen1> *show your kernel running
03:51:22 <bauen1> as for posters, pick a part of the kernel, maybe security or the problems of multitasking
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03:56:58 <Desetude> bauen1: it might be a good idea for me to do that as well as a poster about something simpler
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04:01:17 <bauen1> maybe an explaination of interrupts for the average person and a small example from the kernel (keyboard)
04:02:05 <klange> a simple editor to provide an interactive demo of keyboard input wouldn't be bad
04:03:01 <bauen1> ^ and a few funny demos
04:03:23 <bauen1> but if you show of your os I would really recommend getting a framebuffer, vga text mode just doesn't look good
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04:05:54 <klange> I'll always +1 some sort of graphical demo.
04:06:25 <klange> If you boot with Grub or use a VM, it's really easy to get a linear framebuffer you can throw pixels at quickly.
04:06:58 <bauen1> use a virtual machine with grub, or the framebuffer might be extremly slow
04:07:18 <klange> Combine that with some precompiled graphical assets like a photo of your school's mascot bouncing around like an old DVD player...
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04:09:21 <bauen1> maybe 2 players snake
04:09:42 <Desetude> klange: aha that'd be cool
04:15:40 <Desetude> I'll try getting a framebuffer working then
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04:23:27 <klange> Back to where I was weeks ago, deciding whether I want to port my Python text layout engine to C, or implement DEFLATE (or lzma, though I'm preferring DEFLATE for its use in web stuff, and for its speed)
04:26:42 <klange> If I do deflate or lzma, those can go in my bootloader to improve startup times *and* go towards reimplementing my package manager...
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04:34:30 <doug16k> lzma is quite a lot slower than deflate. the extra compression ratio probably isn't worth it
04:35:02 <doug16k> lzma is something like 3x slower and 30% more compression, according to this paper -> https://cran.r-project.org/web/packages/brotli/vignettes/brotli-2015-09-22.pdf
04:35:53 <klange> lzma's compression abilities are damn near magic, but yeah, the performance hint is considerable
04:36:33 <klange> hit*
04:38:28 <klange> I have to consider both compression time at build, and load time at startup. lzma may be able to produce a payload small enough that its disk load time is reduced enough to compensate for the decompression, but it takes several seconds to compress at build compared to <2 for gzip to its thing.
04:39:16 <klange> Plus, again, deflate/gzip gets you web compression if you want it.
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04:41:11 <klange> compressing a ~40MB payload with gzip: 1.3s; with lzma: 13.2
04:41:33 <doug16k> on default compression level, right?
04:41:36 <klange> yes
04:42:38 <doug16k> I wonder if gzip on best would still beat lzma on fastest :)
04:45:23 <klange> lzma --fast: 2.14s, 11M, still takes 0.7s to decompress; gzip --best: 4.2s, 12M, but still takes 0.3s to decompress
04:46:12 <doug16k> wow
04:47:12 <doug16k> the other way around is probably pretty shocking though, lzma best, gzip fastest :D
04:47:24 <klange> the xz-utils manual does report that -0 (--fast) for lzma/xz can outperform gzip -9 with better compression, though I don't know if I agree with the "much better" wording - probably depends on the payload
04:47:45 <doug16k> is your payload mostly binaries?
04:48:15 <klange> It's an ext2 filesystem, mix of binaries, text from headers, some bitmaps, a good bit of blank space
04:48:29 <doug16k> lzma has a massive window size, so it probably destroys deflate on huge amounts of text
04:50:14 <doug16k> 22 bit window vs 15 bit, IIRC
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04:54:04 <doug16k> yay! fixed a catastrophic bug in my physical memory allocator that happens when there's no memory > 4GB. been searching for this one for a few days now
04:54:24 <doug16k> missing one line: low = true;
04:54:28 <doug16k> lol
04:56:00 <doug16k> it allocated from the < 4GB pool, and always freed into > 4GB pool, regardless of where the page was :)
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05:20:11 <kingoffrance> Desetude: port libaa/libcaca etc. maybe mplayer, or a matrix-like screensaver
05:20:45 <Desetude> kingoffrance: don't have enough time for those realistically, sadly
05:22:37 <kingoffrance> make the pc speaker beep as cpu usage goes up down?
05:23:08 <kingoffrance> then convert some midis or something to beeps
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05:23:53 <kingoffrance> you want a little beep on keypresses like the movies
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05:32:22 <ybyourmom> Don't tell me what I want or don't want
05:32:37 <ybyourmom> Who died and made you all knowing god
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05:36:03 <kingoffrance> sorry des, i didnt know your mum attended your high school
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05:40:15 <kingoffrance> if an all knowing god died, then clearly they were an imposter
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05:42:41 <ybyourmom> rip god 2018
05:43:23 <ybyourmom> Actually cancel that, rip me 2018, I'm going to sleep
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05:49:27 <Desetude> kingoffrance: :P
05:49:53 <Desetude> kingoffrance: beeping does seem a bit obnoxious though with so many other people there though
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05:55:30 <kingoffrance> you can try to rig it to a crystal battery or solar or something
05:55:47 <kingoffrance> joe average, probably just wants to get on facebook / play halo /etc. so you will never impress them
05:56:13 <kingoffrance> jwz, netscape developer paraphase: every program expands until it can ead email. those that cant are replaced by those that can
05:56:28 <kingoffrance> also paraphrase: the average user is asking "how will this program get me laid?"
05:56:50 <kingoffrance> i would add the corollary: nethack can notify you of emails
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06:01:38 <Desetude> kingoffrance: that is one dim view of how people think lol
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06:12:12 <nastaki> doug16k: i think i went to conflict unintentionally with verilog guys, i presented in my opinion a sane view that every reg is unique on SIMD cards, which means how it works is that fifo entries that retire just ignore writebacks into the corresponding spots, in other words, address space would have to pagefault on initialiation and active lanes cast away from it, only then you'd have correct order
06:12:20 <nastaki> i presented such a method
06:13:20 <nastaki> cause all the concept is based that writebacks are never performed on the pointers, so it needs to trace the whole address space of every reg in the handler, to know which was the exact base during that time
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06:22:08 <nastaki> cause i was so much bisecting the most important bits of the hw, there are just millions of lines that is expert work but generally do not matter
06:25:45 <nastaki> from those links what i offered to the society, if you study a bit of regfiles and full pipelining of inst queues and fifos, it is going to be almost enough for you to understand how the method actually functions
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06:32:11 <kingoffrance> Desetude: i believe i read in knuth it was supposed to be sexadecimal not hexadecimal, but that was too racy for 1960 ibm. so therer is perhaps an opposite effect as well, depending on audience
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06:36:25 <nastaki> however i go again, i hope soon to be able to finnish this type of talks here, as of help that i need, i do not need much, but at some point when i push the code i need society to understand the underlying method for maintance sake, cause i am unable to maintain such a large stack myself to the world
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06:42:05 <nastaki> i am confident that i publish the code, and maybe slight set of tooling for additional precompiling, but i pull the stack with using stable trees of the latest, i think the code may be merged also if it is allowed
06:42:54 <nastaki> i do not want this stuff i i've been spewing to last forever, hopefully this year it will end with coding
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06:47:39 <nastaki> geist: are you able to forgive me at some point? and yet work with me in small degree? might respond currently, if you got the risc-v board , and do you intend to add support to your os fuschia there?
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06:58:34 <nastaki> almost seems like the troubles will never end, if i can somehow regain my reputation of not being abusive and abrasive in the future, it is hard my mind plays tricks in anger modes, but might be still possible after all if i gain some stability in my life, maybe some that got hurt will not forgive me but anyhow its their choice
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08:34:55 <doug16k> it's really unfortunate that %#04x isn't suitable for 16 bit values, you have to obfuscate it to %#06x to make room for the 0x :(
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08:41:07 <doug16k> %#18p srsly?
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08:42:28 <doug16k> and that triggers Wformat warning! :(
08:42:57 <doug16k> %p is "implementation defined", I'm just going to implicitly 0x pointers
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08:45:30 <palk> I don't like the capital X it uses with '#', so I use 0x%0...
08:46:36 <doug16k> I haven't implemented # for a while. I broke down and added it today. not liking its semantics at all
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08:49:44 <doug16k> maybe manually saying 0x%... wasn't so bad after all :P
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08:52:24 <palk> I don't think '#' is defined for the 'p' specifier...
08:53:17 <palk> assuming this is your own implementation, you're free to add it of course, but you might as well just make 'p' add the prefix by default
08:54:16 <palk> and instead of mucking around with the field width, you're better off specifying the precision (e.g.,) '%#.4X'
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08:54:57 <palk> since precision (number of digits) is what you're actually concerned with as opposed to the field width
08:55:06 <doug16k> yes that is much better, thanks
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10:50:57 <Ameisen> gcc does _not_ like being built with certain optimizations
10:51:01 <Ameisen> starts getting weird behavior
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10:51:18 <Ameisen> like thinking 'l' and 'L' are the same thing, and complaining about duplicate case statements
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10:52:10 <palk> sounds like a bug
10:52:40 <Ameisen> maybe. Usually, that implies some sort of UB in the compiler's source that is only expressed with certain optimizations.
10:52:48 <Ameisen> like how LTO tends to make UB more obvious
10:53:11 <palk> yep; could be
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10:55:53 <Ameisen> people should just write code without bugs
10:56:20 <palk> sure would be nice
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10:58:12 <doug16k> I'm about to give up on 8.1.0 and go back to 7.3.0. debug info is very buggy
10:58:24 <doug16k> suddenly step over steps into everything
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10:59:10 <doug16k> and every local variable everywhere is zero
10:59:15 <doug16k> ...forever
11:00:11 <Ameisen> doug16k - I'm noting that gcc appears to be defaulting to have debug info even when I specify -g0
11:00:19 <Ameisen> which LTO doesn't like
11:00:25 <Ameisen> I added a check in code for it
11:00:58 <doug16k> Ameisen, oh, about LTO debug info, check this out -> https://gcc.gnu.org/gcc-8/changes.html
11:01:00 <bslsk05> ​gcc.gnu.org: GCC 8 Release Series — Changes, New Features, and Fixes - GNU Project - Free Software Foundation (FSF)
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11:01:17 <doug16k> Link-time optimization improvements: We have significantly improved debug information on ELF targets using DWARF by properly preserving language-specific information. This allows for example the libstdc++ pretty-printers to work with LTO optimized executables.
11:01:34 <Ameisen> that would explain that one
11:01:52 <doug16k> there goes the idea that you can't have any debug info in LTO build, right?
11:02:17 <Ameisen> a little confused why it's generating dwarf data when I specifically set -g0, though
11:02:24 <doug16k> have fun pretty printing a C++ container with no debug info
11:04:02 <doug16k> I'm going to roll back to 7.3.0 until 8.1.1 appears on the gcc mirrors
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11:08:22 <doug16k> I looked at the bug list, and filtered by the word "debug" -> https://bit.ly/2IIfcwe pretty terrifying
11:08:25 <bslsk05> ​bit.ly: Bug List
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11:11:53 <doug16k> this is my "step over is step into" issue -> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=32186
11:11:56 <bslsk05> ​gcc.gnu.org: 32186 – -ggdb emits broken debug info
11:14:41 <doug16k> changing ggdb to g doesn't fix it either
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11:17:31 <kingoffrance> there is/was a separate "gnu debug link" for gcc/ld that would let you output debug info to separate binaries/libraries, then keep handy for gdb, but ive never seen any distro/package/anyone actually use that feature
11:18:25 <kingoffrance> meaning, just debug info, not like libc_g.so or whatever. youd have /lib/libc.so and /debug/lib/libc.so (just debug info) and then you could "combine" them when needed, e.g. pass to gdb
11:18:54 <kingoffrance> i always liked the idea, but never seen anyone actually use it, if it is even still around
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11:22:35 <doug16k> kingoffrance, the `strip` tool has --only-keep-debug and --add-gnu-debuglink to create the special section that tells gdb where to get the debug info
11:23:19 <doug16k> or is it the other way around? debug info executable points back to stripped one. not sure
11:23:50 <kingoffrance> yeah, that sounds about right. ive just never seen any distro use it before :/
11:24:03 <doug16k> but yeah, I don't think people use it much. it's a good idea
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11:28:06 <dormito> while I not really use Ubuntu in years, iirc it kept the debug symbols in seperate files (packages) and used the debug linkage
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12:11:57 <buhman> why would I want to define a register as a static value instead of a macro?
12:12:27 <buhman> I like the idea of having registers exist as symbols, but I don't see that pattern used very much in lk
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12:39:11 <doug16k> buhman, "static constexpr" constants have a type, macros do not
12:43:01 <doug16k> calculated defines expand to a big complex expression every place they are used, constexpr constants are evaluated once. if you don't have enough parentheses in a macro definition, it can do the wrong thing
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12:47:03 <doug16k> example: #define FOO 2+2 ... int bar = 8 * FOO; oops, you expected 32 but you got 18
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12:56:05 <Ameisen> static constexpr constants are also values from the point of view of the compiler, can be in a namespace, etc
12:56:15 <Ameisen> and you can do really fun things with them
12:56:29 <Ameisen> like coalesce operations on registers if your template fun-ness detects no side-effects
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14:44:04 <afr0ck> hello motherfuckers
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14:44:51 <afr0ck> suppose i have a filesystem that supports fragmentation of the last block
14:45:09 <afr0ck> that is to say the last block could be only a fragment of a block and not a whole block
14:45:54 <afr0ck> what kind of change do you propose for the UFS inode to sopport such a thing ?
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14:46:21 <afr0ck> considering that the number of fragments per block is configurable at the moment of installing the filesystem
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14:50:58 <glauxosdever> That was... interesting
14:51:14 <kingoffrance> i really just pulled my FS design out of thin air, and havent implemented it yet...but i basically have a fixed block size, and then a table indicating "how many bytes actually used inside each block" ... and then a block can have multiple subblocks.
14:51:40 <kingoffrance> so, i am not helpful...but for something made up for me to toy with, i just wanted simplicity and flexibility...god knows how perfomance will be if i ever get that far
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14:53:11 <kingoffrance> the theory is flexibility means i can toy aroudn with algorithms and make up for any horrible decisions and not be too painful
14:53:12 <glauxosdever> Actually, a "native FS" design depends on the VFS design. It doesn't make sense to e.g. store UNIX permissions when you use ACLs instead.
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14:55:50 <glauxosdever> And if your VFS uses advanced features that most FSs don't have, it probably makes sense to include these features in your FS
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15:02:51 <doug16k> afr0ck must pay a fortune per minute for IRC access. had to nope out before he drained his bank account after ~6 minutes
15:03:55 <glauxosdever> Not only that -- the "greeting" was also interesting
15:04:32 <doug16k> yes
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15:06:47 <kingoffrance> at first i thought id do some giant hash table type thingy, but then virtual memory and other things i already had code to mark blocks as used/unused. and i wanted a way to mark parts of disk as "bad" so i found i needed to keep track of "blocks" anyways
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15:08:02 <kingoffrance> so, i am total noob...but "simplest thing that possibly works" is my only advice in many cases.
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16:32:35 <doug16k> kingoffrance, I prefer "the simplest thing that's also lightning fast" when possible :D
16:33:15 <doug16k> usually you can make it fast without significantly increasing complexity
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16:36:05 <doug16k> my bootloader is an example. before it pessimistically did one sector at a time, one page at a time. took 10 seconds in bochs. now it makes an I/O vector of the memory range, and a disk read plan of sector runs to read, and loads it in a split second, in bochs, which is very slow
16:36:14 <doug16k> it is also much simpler now
16:38:11 <doug16k> all kinds of disk I/O and page alignment and mapping crap was all tangled up in the elf loader before. now that is hoisted out to simpler things that do the memory and I/O only
16:38:34 <klange> bootloaders are basically just small OSes anyway
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16:39:10 <doug16k> yes
16:39:28 <doug16k> at first it seems so simple, but by the time it is done it is a significant amount of stuff
16:39:32 <klange> the real test of your bootloader is when it's more advanced than your first go at the actual OS
16:39:44 <mischief> tfw two drivers disagree about how a device works
16:40:15 <klange> tfw a device has multiple operating modes to handle different incorrectly written drivers
16:43:24 <mischief> tfw you can't make the device do what you want :(
16:43:46 <klange> what's the device?
16:44:15 <mischief> davicom dm9000
16:44:28 <mischief> should be easy, but the documentation is .. par for the course i guess
16:44:42 <klange> Old ISA NIC?
16:44:53 <mischief> no, it's attached to a mips soc
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16:45:27 <mischief> ALowther: fix your irc client
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16:49:33 <mischief> i get one packet and then the next one breaks
16:52:43 <doug16k> mischief, my guess: scour the docs for write-1-to-clear bits. you probably need to do it in multiple registers to fully acknowledge the interrupt
16:53:28 <mischief> yep, i'm writing to the isr rx latch
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17:06:18 <mischief> grr
17:06:24 <mischief> i will make this work if it kills me
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18:02:21 <klange> mischief: please don't let a nic kill you :(
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18:05:50 <mischief> >:(
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18:22:03 <nastaki> i don't think i've made very rough or strong conceptual mistakes around the theory, but i've seen and faced and imagine that unintentionally something time to time has gone wrong to me as well, i have the gutts and confidence to talk about all of this still, in large part my views should be conceptually correct and such
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18:25:25 <nastaki> if i am drifting around 80-90% accuracy without ever having tried to mislead people in my bad situation, i'd be still satisfied, some of the mistakes i've done i have tried to fix
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18:30:55 <nastaki> most of the drm based gpu drivers are licensed under MIT, which apart from linus accepting to the codebase i dunno what arguments had it produced or even conflicts, but linus has accepted those hunks into the tree still, and AFAIK other OS's and kernels can use those drivers in any form, even in commercial product
18:31:35 <kingoffrance> i decided if i ever write an nic driver i am buying an old parallel port NIC...hopefully is easier ...
18:31:57 <klange> plenty of simple pci nics
18:32:02 <doug16k> mischief, rub a balloon on your hair and keep it in arms reach. if the NIC makes any sudden moves, threaten it with the static electricity. they always back down from that
18:32:06 <klange> why go so old school?
18:32:36 <clever> ive read the source for the NIC in my old x86 router, and it was pretty simple
18:32:53 <klange> rtl8139, e1000, pcnet are all things you can actually obtain physically
18:33:07 <clever> 4 DMA's tx buffers, each with a control, dma addr, and status register, an irq for tx finished, though i didnt focus on the receive side
18:33:45 <clever> just set the size and tx bit in a control register, and the card reads the configured the packet and sends on its own
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18:36:06 <kingoffrance> well, i am probably doing things backwards from most. i start iwth userland portable code, and work my way "up" to a kernel. if i never get there, i will at least have some nice portable oo-ish c libraries.
18:36:15 <kingoffrance> so pci stuff, irqs, is all down the road...
18:36:22 <doug16k> clever, the receive side of rtl8139 is the funky part. it's a circular buffer and you have to keep copying data out of it
18:36:43 <kingoffrance> but serial port/parallel port is pretty easy even without a real kernel :)
18:37:29 <klange> no time like the present to start hacking away at a kernel
18:37:44 <klange> plus you can look at your userspace and figure out what features you need from the beginning and design around them
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18:42:55 <nastaki> are there any standards or protocols for those network/nic packets, since i never read the other book local libraries had about sockets?
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18:43:29 <nastaki> pinout of the default cable , might be of interest too
18:43:40 <doug16k> nastaki, it's layered. ethernet -> IP -> TCP, for example
18:44:26 <doug16k> ethernet worries about how to communicate with the LAN, IP worries about routing across gateways, TCP worries about retransmitting packets
18:46:00 <nastaki> do the have some common packet standard too though?
18:46:02 <doug16k> there are other parts involved too. ARP translates IP addresses to ethernet MAC addresses. DHCP assigns IP addresses and tells you where to find the DNS server(s) and gateway(s)
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18:46:40 <nastaki> doug16k: yeah reasonable amount of that i know , yeah, allthough good to recap
18:47:11 <doug16k> first step is to look at ethernet. understand how to communicate with other devices on your local network. then look at ARP, to be able to translate IPs to ethernet addresses
18:47:52 <klange> arp is overrated in our overly natted present day
18:47:59 <mischief> i think i figured it out
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18:48:09 <mischief> i am not really sure what was wrong frankly
18:48:21 <mischief> something to do with not reading all of the bytes out of the chip i think
18:48:37 <nastaki> maybe something based of rfcXXX
18:48:39 <doug16k> they are nested. a TCP/IP datagram is a data payload nested inside a TCP packet, nested inside an IP packet, nested inside an ethernet frame
18:49:31 * mischief nests inside doug16k
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18:51:55 <doug16k> mischief, I had a similar issue with my XHCI driver. worked fine on qemu, got one IRQ and went dead on bare hardware. turned out I had to acknowledge a bunch of things by writing 1 to RW1C bits
18:52:15 <doug16k> each interrupt "reason" had to be acknowledged
18:52:22 <doug16k> if I left one unacknowledged, no more IRQs
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18:56:33 <nastaki> https://hpbn.co/http1x/
18:57:11 <nastaki> fairly scary. they call the fifo parallelization stuff also as pipelining
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18:58:02 <nastaki> thanks doug16k: i try to look at it all as a hobbyist some time
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19:15:44 <nastaki> hehee, i read it, http pipelining seems like vulkan for nic's :D
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19:16:25 <nastaki> must dig deeper later, would be useful to inspect some hw nic's verilog too
19:18:11 <mischief> i think maybe listening to metal helped me fix my dm9000 driver
19:18:26 <mischief> getting angry at it totally worked
19:18:30 <mischief> now to fix tx
19:19:03 <klange> getting angry is a great way to resolve problems
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19:22:05 <nastaki> anger can be self-destructing sometimes , i have found excess of it destroying the leads, normally would have to calm down to some degree if somethung complex is needed to think about, then in the end it seems easy again
19:23:18 <mischief> you again
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19:27:49 <nastaki> well simiarly to graphics cards, i expect some hw fifo of command processors to have multiple channels, depending on what type of hardware card we talk about, definitely there are some sort of more advanced versions, cisco cards or something
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19:28:48 <nastaki> those channels work in parallel as serial or parallel in and parallel processing, and then again out, maybe this would be some nic accelerator :D
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19:35:07 <mischief> yay, tx works
19:35:37 <mischief> the driver is synchronous but whatever, it works
19:35:39 <klange> the rule is once you get a NIC working you need to connect to Freenode directly and let us know
19:36:06 <mischief> well you see i am avoiding fixing a mess i got into with the tlb
19:36:13 <mischief> so i am working on peripheral drivers :s
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19:39:57 <nastaki> mischief: do you disagree with me again , start talking about your bot crap, and i do rage quit or ignore! i've been so angry that even simple thinking goes a mess, well networking and the hw solutions for it is one of the largest field , if you were to understand it to some degree, you would not pull such crap to me about bots and do crappy work on gpus
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19:47:41 <nastaki> overall i talked a british pool guy about data servers centers, namely he worked in such areas, and he said the latters are bottlenecking fiber optics pipes in most of the europe, maybe this 5g becomes the main standard i.e wireless still
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19:49:30 <nastaki> our country is small, but ouh god damn, how big areas there are yet in the world, all requires fast routing
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19:57:22 <nastaki> and to study the juristiction , ip patents to perform any real work there, choosing one area in the world, even though it is somewhat still complex and though there is massive work to be done, it is all different then picketing all the time dudes, stop it before you waste all of chanches
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20:16:06 <nastaki> back to bed, anyhow as i said, i may end up finally pushing the code this year for several card performance enhancements, it requires a bit of work and my justified paranoia needs some support on curing it up, you do a lowsy support package even over IRC there, where we do not even have to meet or provide our personal details by default
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20:49:19 <Mutabah> mischief: procrastination is a wonderful tool :)
20:49:41 <klange> s/wonderful tool/terrible curse/
20:51:13 <Mutabah> porque no los dos?
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20:52:27 <klys> "for the question don't i two?" i really don't know spanish
20:53:03 <Mutabah> I can't spell it - It's a bit of a meme, it's meant to mean "why not both" (referencing a mexican advertisement)
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20:53:19 <klys> alowther
20:53:30 <klange> you're not going to get through to them
20:53:42 <Mutabah> What's the ban to send someone to a fix-your-connection page/
20:53:44 <klys> i did once, and he apologized
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20:55:14 <klange> append $##fix_your_connection to the hostmask for the ban iirc
20:56:16 --- mode: Mutabah set +b ALowther!~alowther@68.200.224.209$##fix_your_connection
20:56:54 <Mutabah> ALowther: PM me or one of the other ops to get that cleared once you've fixed those ping timeouts
20:57:08 <Mutabah> (And I know odds are the connection is already gone, but logs exist)
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21:01:11 <doug16k> isn't there a way to proxy your IRC through a webserver or something, so you never join/leave?
21:01:19 <doug16k> I vaguely remember someone mentioning it
21:01:54 <doug16k> I mean, your own vps or something
21:01:58 <Mutabah> There's a few services like that
21:02:04 <Mutabah> ZNC is one
21:02:09 <graphitemaster> behaves like that for me
21:02:11 <graphitemaster> I use ZNC
21:02:31 <graphitemaster> you never see connection interruptions either sometimes
21:02:32 <Mutabah> Or if you have a VPS, use screen/tmux with irssi/weechat
21:02:40 <graphitemaster> so it's really problematic if you have a bad connection
21:02:48 <doug16k> Mutabah, yeah I suppose that's the obvious way :)
21:02:54 <graphitemaster> because ZNC does all the reconnect for you without notifying you
21:02:59 <graphitemaster> I've had it happen a few times
21:03:10 <Mutabah> Noice
21:03:17 <Mutabah> Does ZNC have a web interface?
21:03:22 <klange> They're called bouncers.
21:03:24 <Mutabah> and is it multi-user?
21:03:34 <klange> I just run irssi in screen on a remote server, though.
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21:03:37 <graphitemaster> it has a web interface, yes
21:03:43 <Mutabah> klange: screen+irssi represent!
21:03:45 <graphitemaster> it runs on a port you configure
21:03:51 <graphitemaster> and yeah it can have many users
21:03:56 <Mutabah> Noice, might look into that
21:04:14 <graphitemaster> znc can also restore sessions through restarts
21:04:18 <doug16k> maybe we could suggest it to alowther. he mentioned he doesn't know why it is doing that once
21:04:30 <graphitemaster> so you can restart the system without ever losing connection to IRC
21:04:44 <graphitemaster> only for non SSL/TLS networks tho
21:04:59 <klange> Oh, *that* kind of TLS magic.
21:05:03 <klange> TCP magic*
21:05:13 <doug16k> neat
21:05:21 <graphitemaster> been using it for a long time
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21:05:46 <graphitemaster> ZNC also lets you do some other questionable things, like fake your CTCP responses
21:05:53 <graphitemaster> go ahead, CTCP time me ;-)
21:06:25 <graphitemaster> I've also tweaked DCC so that no matter what someone sends me via DCC (either file or chat) it tells them to fuck off iirc
21:06:38 <doug16k> lol
21:08:51 <clever> irssi has similar restart mechanics, and i can see why ssl would be trouble
21:09:13 <graphitemaster> it's only trouble because none of the tls libraries have a mechanism to serialize the session state
21:09:31 <graphitemaster> it's very easy to serialize a standard TCP socket's session state
21:09:39 <graphitemaster> but tls is impossible
21:09:45 <klange> Yeah, you need to be able to recreate the exact state of the encryption to continue.
21:10:44 <klange> I should make my text renderer do the boxes-with-codepoints thing...
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21:24:12 <klange> Trying to think of a way I can signal to a guest running in qemu from a CD that it should run in a headless mode without any direct VM interaction...
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21:35:12 <buhman> my board has a UART->FTDI chip; I'm trying to make a USB-FTDI adapter work, but at this point I guess I have no idea how the uart clock dividers work. When I first power the FTDI adapter, the RX light blinks appropriately when the MCU is clocking TX on that UART, but when I use `stty -F` or `screen` or similar, the TX light stops blinking
21:35:51 <buhman> I also tried my UART's autobaud, which results in something almost-working, except the output from the FTDI is garbage
21:36:57 <buhman> is there a sane way to detect what is actually happening, without an oscilloscope?
21:38:07 <Mutabah> Not really - Your best option is to just read up on how to configure the UART, and how the FTDI bridge works
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21:53:16 <doug16k> klange, you mean signal it from the qemu command line?
21:53:32 <doug16k> set the hard drive serial number to a magic value
21:54:11 <doug16k> is there a hard drive?
21:54:18 <Mutabah> MAC address?
21:54:38 <Mutabah> Custom option ROM?
21:54:51 <klange> I was thinking about an option ROM.
21:58:24 <doug16k> you can add ide-cd.serial=xxx to the cd device option and see it in the drive identify, assuming you do one
21:59:02 <klange> Hm, that's definitely a possibility.
21:59:16 <doug16k> or -global ide-cd.serial=xxx then it gets set on the one it adds by itself
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22:01:18 <doug16k> ...through -cdrom or whatever
22:02:08 <doug16k> or, put it into the cd mastering options
22:02:24 <doug16k> set one of those publisher fields. then you can make a cd image specialized to just go headless by default
22:02:50 <doug16k> read it from PVD
22:03:21 <klange> If I do that, I can just make the CD start the headless process with no signal :P
22:03:29 <doug16k> yeah :)
22:04:17 <doug16k> ok, the scenario isn't that easy then
22:04:21 <doug16k> lol
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22:08:36 <doug16k> the -option-rom option doesn't give a way to provide an address. you could scan 0xA0000-0x100000 for the japanese toaru utf-8 + headless + japanese toaru as a signature. they probably start at 16KB boundaries if I had to guess
22:08:52 <doug16k> idk if it will freak out if you go digging through there and touch a range with nothing there
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22:09:29 <doug16k> might do that fatal abort "accessed non-ram/non-device!!!" thing
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22:10:24 <doug16k> it might allow 0xa0000 thru 0x100000 entirely though
22:10:49 <doug16k> s/xa/xc/
22:12:36 <doug16k> option roms might want the whole standard thing with structures at the start and all that. I think it magically knows where to load roms by inspecting that
22:13:04 <doug16k> just guessing though
22:18:12 <doug16k> yay! I have a complete function trace logging system now. I output a stream of 13 byte packets to port 0xEA, and output it to a fifo on the host filesystem, and I have a tool that loads the symbol table and parses the packets and prints out a stream of function entry/exit lines -> https://gist.github.com/doug65536/4a92a766e2a5fd70d502210795c6d58e
22:18:14 <bslsk05> ​gist.github.com: gist:4a92a766e2a5fd70d502210795c6d58e · GitHub
22:18:42 <doug16k> first column is thread id
22:20:10 <doug16k> works in realtime
22:20:58 <klange> neat
22:24:14 * ybyourmom buildroots for the first time
22:24:30 <ybyourmom> I am becoming the disgusting linux sysadmin I never wished to be
22:24:57 <klange> replace all your linux systems with PonyOS
22:25:36 <ybyourmom> I'll soon be replacing them with my kernel tbh tbh
22:25:38 <ybyourmom> :')
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22:26:57 <klange> Speaking of which... I can probably run ponysay on toaru-nih... hmm...
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23:46:39 <promach> For http://cloudx.cc/shp.html , how does c-slow retiming helps to build multithreading environment ?
23:46:39 <bslsk05> ​cloudx.cc: CloudX
23:46:56 <promach> https://en.wikipedia.org/wiki/C-slowing
23:46:56 <bslsk05> ​en.wikipedia.org: C-slowing - Wikipedia
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23:52:59 <klange> promach: you're asking some really obscure stuff at a hardware level that isn't really all that suitable for this channel
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23:54:29 <klange> You may want to find a place that specializes in FPGAs or CPU design.
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23:57:11 <klange> I stretch the definition of osdev pretty far when it stems from relevant discussion, eg. basically anything that has to do with the development of someone's actual OS project, but we're not an FPGA channel, electronic design is separate concern, and when you're specialized as much as "OS development" as-is, the relevance of other things (like GPUs *cough*) really starts to wane.
23:57:34 <klange> And I already probably annoy the shit out of people with all my blabbing about Python.
23:58:00 <Mutabah> Ah, but it's you complaining in the context of making it run in your 100% custom envirnment :)
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23:58:37 <doug16k> python is pretty relevant though, it's a platform that user processes run on
23:59:16 <doug16k> you talk about getting the underlying layers up enough to support python. that's pretty much right on OS dev
23:59:59 --- log: ended osdev/18.07.01