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#osdev2 = #osdev @ Libera from 23may2021 to present
#osdev @ OPN/FreeNode from 3apr2001 to 23may2021
all other channels are on OPN/FreeNode from 2004 to present
http://bespin.org/~qz/search/?view=1&c=osdev2&y=22&m=6&d=15
00:00:00 <doug16k> 10ns is pretty good, but yeah
00:01:00 <heat> i should figure out how to load microcode
00:02:00 <heat> it's not trivial afaik
00:02:00 <heat> and relying on firmware updates to keep the fit table updated isn't a great idea I guess
00:04:00 <heat> dunno if you've looked at the SDM but they have a table the CPU looks at to do stuff before the CPU even starts executing the reset vector
00:04:00 <heat> it's fucking neat
00:04:00 <heat> that's how firmware loads ucode
00:07:00 <heat> also, cool fact: new CPUs can have page tables in ROM
00:08:00 <doug16k> I think the cpuid instruction does it too, on some models anyway
00:09:00 <doug16k> makes sense to put that in the ridiculously bloated instruction
00:11:00 <heat> intel uses an msr in P6+
00:26:00 <doug16k> yeah I see now, it needs to use cpuid first then it can do it. I misunderstood it before
00:27:00 <heat> would really like for cpuid to become a sort of ioctl
00:27:00 <heat> and yes im an agent of chaos and destruction
00:31:00 <doug16k> I wish that linux would put lines like this in dmesg: ***** HARDWARE SUCKS: Firmware did not load latest microcode
00:32:00 <heat> ***** HARDWARE AND FIRMWARE SUCKS: Firmware did not load latest microcode and hardware is hopelessly broken
00:32:00 <heat> FTFY
00:32:00 <klange_> ***** COMPUTERS SUCK, STOP USING THEM
00:34:00 <doug16k> friend told me about an entire building of apartments was one big lan and everyone could see every resident's printers and stuff
00:34:00 <heat> alexa, print me 10 copies of sonic rule 34
00:35:00 <heat> well tbf that's the network engineer's fault
00:35:00 <heat> crap idea
00:38:00 <doug16k> yeah, friend told the residents how crazy that is for security and they are working on it
00:39:00 <zid`> Just use a router and put youtself behind some NAT I guess
00:40:00 <zid`> treat the building like the internet
00:40:00 <doug16k> yeah, that's what I said, wan port goes to building. exactly
00:40:00 <zid`> it'd just be annoying if they've wired you multiple ethernet outlets to multiple rooms which you now cannot 'use'
00:42:00 <zid`> I assume this is just the topology you'd ned up with if you weren't willing to do router-per-unit
00:42:00 <zid`> and instead wired each room to a big 48 port switch/hub/whatever
00:46:00 <doug16k> could you fix that buy forcing the ports for each unit to be in their own vlan?
00:47:00 <doug16k> per-apartment vlan
00:48:00 <kazinsal> https://www.cisco.com/c/en/us/td/docs/switches/lan/catalyst3560/software/release/12-2_52_se/configuration/guide/3560scg/swpvlan.html
00:48:00 <bslsk05> www.cisco.com: Catalyst 3560 Software Configuration Guide, Release 12.2(52)SE - Configuring Private VLANs [Cisco Catalyst 3560 Series Switches] - Cisco
00:49:00 <kazinsal> easiest thing to do is something like that
00:49:00 <doug16k> nice
00:57:00 <zid`> yea you could do vlans
00:57:00 <zid`> I guess I now understand the point of vlans in a practical sense :p
01:24:00 <sbalmos> ah, that reminds me of the dorms, each building really was on its own subnet. Screwing with others' printers, sending "SHUT THE F* UP" or "We can all hear you screwing this week's girlfriend" print jobs to them
01:35:00 <zid`> sounds right, nerds hacking people's printers, everybody else fucking :p
02:01:00 * kingoffrance squints at ack code, outputting patterns of ack asm. considers modifying to output nasm macros instead. closes visor, charges into hell
02:01:00 <kingoffrance> its a battle
03:52:00 <klys> budding nybble code program. has two days work so far.
04:19:00 <doug16k> I ordered a few ESP32 modules to play with
04:21:00 <doug16k> wifi + bluetooth + dual core microcontroller for $15 is crazy
04:23:00 <doug16k> why buy one when you can buy 3 for 3x the price?
04:24:00 <doug16k> so funny how volume discounts are pretty much unheard of on websites
04:25:00 <doug16k> the ones with huge volume discounts are a ripoff for one
04:37:00 <doug16k> 160MHz with 320KB of memory? I don't even know
04:40:00 <clever> from memory, the XIP logic includes a form of MMU
04:40:00 <clever> so you can map pages of the addr space to pages of SPI flash
04:41:00 <clever> that then allows multiple binaries to co-exist in flash, and you can get rollbacks to undo a botched OTA upgrade
04:42:00 <doug16k> neat coincidence, I was just reading the part where it talks about reading constants from program memory
05:07:00 <doug16k> 80-240MHz and it has an ultra low power processor, it's big little
05:12:00 <doug16k> kind of anyway. I guess true big little can execute the same instructions
05:24:00 <doug16k> wow, there is a model with 4MB flash, 8MB memory
05:24:00 <geist> yah i have the esp32-c3 here as well
05:25:00 <geist> i have been meaning to bring up on it. the little default demo it has is actually running some little rtos that's sort of neat
05:28:00 <doug16k> it comes with arduino thing reloaded with FreeRTOS I heard
05:29:00 <doug16k> more fun to replace that though, yeah
05:29:00 <geist> yah there's a full SDK thing too
05:30:00 <geist> the docs look mostly complete. seems to be easy tnough to run on it, though all mention of BT and wifi are totally absent
05:30:00 <geist> so i dunno if they just dont document that, it's on another core, or all of the above
05:31:00 <geist> this is the newer riscv one i have here
05:43:00 <doug16k> windowed registers?
05:44:00 <geist> hmm?
05:44:00 <doug16k> ah neat, it can operate either way, but the non-windowed mode reduces performance and increases code size
05:44:00 <geist> are you reading about the older arch they had? they've announced they're switching everything to riscv from now on out
05:44:00 <doug16k> ah
05:46:00 <geist> the old arch was uh. what was it. it's not unique to them, but it's more esoteric
05:46:00 <doug16k> xtensa
05:46:00 <geist> yah xtensa
05:46:00 <geist> so yeah in the single core versions i dunno exactly how the responsibility of BT and WIFI and rtos happen
05:47:00 <geist> and if it's all just on one rtos how does one access the BT/WIFI bits
05:47:00 <geist> i dont see it documented
05:47:00 <geist> but it's possible that's exactly it. it's just hidden registers they dont want you to know about
05:47:00 <geist> https://en.wikipedia.org/wiki/ESP32 has a pretty good summary of their lineup
05:47:00 <bslsk05> en.wikipedia.org: ESP32 - Wikipedia
05:48:00 <doug16k> would the arduino library tell you how to use the wifi?
05:48:00 <doug16k> wouldn't you get that as source?
05:48:00 <geist> the feature set of the wifi and ip stack is some checkbox in arduino and you talk to it over some high level interface
05:48:00 <geist> perhaps, unless it's firmware or an .o file you simply link against
05:49:00 <geist> or in a dual core situation it runs on the other core
05:49:00 <geist> easy enough to figure out, just enable tracing and see how it compiles and links
05:49:00 <geist> i think it's an .o file i bet, since iirc even a small arduino sketch on an esp32 still clocks in at a few hundred KB
05:49:00 <geist> and it's probably running the sketch as a thread on top of an rtos or something
05:50:00 <doug16k> yeah it's not likely that wlan will be easy to use, ever
05:50:00 <geist> i have done some arduino work with them and they're pretty nice
05:50:00 <geist> so it's likely they juyst dont want to document the wifi/bt bits
05:54:00 <doug16k> which ones? https://www.espressif.com/en/products/modules/esp32
05:54:00 <bslsk05> www.espressif.com: ESP32 Wi-Fi & Bluetooth Modules I Espressif
05:54:00 <doug16k> the cheap ones I got are the vroom32 ones, which seem to be xtensa ones unless I am mistaken
05:54:00 <doug16k> how do I look for riscv one?
05:55:00 <doug16k> ah I see, c3
06:03:00 <doug16k> 2 for $105, that sounds better
06:04:00 <doug16k> ah, you can get the riscv ones for cheap too
06:07:00 <doug16k> geist, do you have one with megs of ram, or just 600KB or so?
06:14:00 <doug16k> ok I think I found the best one. ESP32-S3-WROOM-2, 32MB flash, 512KB SRAM, 384KB ROM, 8MB PSRAM, 240MHz
06:22:00 <doug16k> ahhh. sneaky and confusing. S3 is xtensa
06:22:00 <doug16k> seems there is a whole market for tricking people looking for the riscv into buying an xtensa
06:26:00 <geist> 600KB. the -C3 as in the wikipedia page
06:27:00 <doug16k> they have the whole model the same except that one letter, and search engines fuzz them into the same results
06:27:00 <geist> the board i have is a ESP32-C3-DevKitC-02
06:27:00 <geist> about $9
06:28:00 <geist> it's really a ESP32-C3-WROOM-02
06:28:00 <geist> with a board around it, so pretty similar
06:29:00 <geist> i think it's basically the same thing as your WROOM-2, though only has 4MB flash (and 8KB PSRAM, which i suspect the S3 does too, since 8MB PSRAM would be crazy expensive)
06:30:00 <geist> https://docs.espressif.com/projects/esp-idf/en/latest/esp32c3/hw-reference/esp32c3/user-guide-devkitc-02.html with links to the WROOM docs at the bottom
06:30:00 <bslsk05> docs.espressif.com: ESP32-C3-DevKitC-02 - ESP32-C3 - — ESP-IDF Programming Guide latest documentation
06:31:00 <doug16k> https://products.espressif.com/#/product-selector?language=en&names=
06:31:00 <bslsk05> products.espressif.com: ESP Product Selector
06:32:00 <doug16k> that says MB right? on PSRAM?
06:33:00 <doug16k> yeah, no C one like that
06:35:00 <geist> yeah thats gotta be a bug. it's K
06:35:00 <geist> makes sense, it's the always on very low power block of sram
06:35:00 <doug16k> ok
06:36:00 <doug16k> I'm not familiar with PSRAM, I just guessed it was DRAM that has a SRAM-like interface
06:37:00 <geist> yah i think that's just their marketing name for it too
06:40:00 <Jari--> hi all
07:04:00 <geist> lo
08:22:00 <kingoffrance> for the person who asked about x86[-16] + vga: VIDEO - GET DISPLAY COMBINATION CODE int 0x10, AX=0x1A00 in another channel, a certain child of the night mentioned nethack code includes an ancient standalone cpp, which it does; i was poking around -- dos nethack uses the above)
08:24:00 <kingoffrance> i dont remember who that was, only pops in and out i think
17:46:00 <nur> I turn 43 today!
17:46:00 <nur> (and still no OS)
17:46:00 <j`ey> happy birthday!
17:57:00 <Ermine> happy birthday!
17:58:00 <stephe> happy :bee:
17:58:00 <stephe> day
18:17:00 <nur> thank you thank you
19:05:00 <heat> congrats
19:05:00 <heat> and fix that last part
19:05:00 <heat> :P
19:08:00 <sbalmos> heat: fun with objdump. rather crazy how many sections the barest of clang cpp executables has.
19:12:00 <heat> yeah
19:13:00 <heat> .text*, .rodata*, .data*, .bss*, the C++ exception stuff
19:13:00 <heat> .init(or init_array) .fini(or fini_array)
19:13:00 <heat> relocation sections if it's relocatable
19:13:00 <heat> .dynamic of course
19:14:00 <heat> the GOT too
21:22:00 <sbalmos> probably dumb general question, any idea just how much overhead there is in Zircon to doing all of the capability mapping, rights checking, etc?
21:33:00 <heat> would expect very few overhead
21:33:00 <heat> at the end of the day, it's just an if
21:33:00 <heat> you have plenty of those in a codepath
21:33:00 <heat> :)
21:35:00 <sbalmos> ¯\_(ツ)_/¯ true. I'm trying to remember where it was, but a few months back was reading an article about all of the handle-grants request-this-does-it-have-rights-to-that effective rights calculation that was going on when creating a channel or transferring a handle from one process to another. just made the gears turn in my head about how much that was, over the course of how much handle passing
21:35:00 <sbalmos> is going on typically
21:35:00 <sbalmos> wish I had bookmarked that article back then :(
21:58:00 <mrvn> Does every process have an array of capabilities and the handle is an index into the array?
22:00:00 <heat> I don't know if handles are pure indexes (since they're non sequential)
22:00:00 <heat> but yeah, kinda as far as I understand it
22:00:00 <heat> handles are capabilities
22:01:00 <mrvn> Maybe a key into a hashtabl
22:01:00 <heat> yeah maybe